KLS, VISHWANATHRAO DESHPANDE INSTITUTE OF TECHNOLOGY, HALIYAL
Knowledge is Power
Mr. Deepak Sharma
Assistant Professor
Dept. of Electronics & Communication Engg
K.L.S’s V.D.I.T, HALIYAL-581329
9481860756
dsharma@klsvdit.edu.in
Area Of Interest
Experience
Publications
Other
Qualification
| Bachelor of Engineering |
|---|
| Electronics & Communication from Sri Dharmasthala Manjunatheshwara College of Engineering and Technology, Dharwad. |
| M. tech |
|---|
| Sri Dharmasthala Manjunatheshwara College of Engineering and Technology, Dharwad. |
Area Of Interest
Digital Electronics
Experience
Teaching
6 Years
Publications
- Presented a paper on “Design, Simulation and Implementation of FLC for Automatic Speed Control of Vehicle” in International conference on Trending Researches in Engineering, Science and Technology-2016 held at Salem, Tamil Nadu.
- Presented a paper on “Comparative Analysis of Multiple Controllers for Semi-Active Suspension System”, in 2nd International conference on Emerging Research in Computing, Information, Communication and Applications. (ISBN 9789351072607) held at NMIT,Bangalore.
- Presented a paper on “Comparative Study of Various VLSI Technologies for generating 16 bit Even Parity”, in International Conference on Emerging Trends in Engineering Sciences 2015 held at JCE, Belagavi.
- Presented a paper on “Design of Parallel Multiplier with Column Bypassing Technique using High Speed Adder”, in International Conference on Emerging Trends in Engineering Sciences 2015 held at JCE, Belagavi.
- Presented a paper on “Design and Implementation of Different DAC Architectures” in 3rd national conference on recent advances in technology and engineering(RATE 2014) held at T-John Institute of Technology.
- “Comparative Analysis of Multiple Controllers for Semi-Active Suspension System”, ELSEVIER Publications (ISBN 9789351072607).
- “Comparative Study of Various VLSI Technologies for generating 16 bit Even Parity”, IJETCSE Publications (ISSN 09761353).
- “Design, Simulation and Implementation of FLC for Automatic Speed Control of Vehicle” in International Journal of Advanced Research Methodology in Engineering & Technology.
- “Design of Parallel Multiplier with Column Bypassing Technique using High Speed Adder”, IJETCSE Publications (ISSN 09761353).
- “FPGA Implementation of Three Stage Pipelining”, IJRITT Publications (ISSN: 2454-1400)
Other
Workshops Attended