KLS, VISHWANATHRAO DESHPANDE INSTITUTE OF TECHNOLOGY, HALIYAL
Knowledge is Power
Mr. Virupax M. Chougala
Assistant Professor
Dept. of Electronics & Communication Engg
K.L.S’s V.D.I.T, HALIYAL-581329
9448337916, 9964376059
vmchougala@klsvdit.edu.in
Area Of Interest
Experience
Publications
Other
Qualification
| Bachelor of Engineering |
|---|
| Electronics & Communication from HIT Nidasoshi, Karnatak University, Dharwad |
| M. tech |
|---|
| (VLSI design and Embedded systems): 2005, KLE, Belagavi. |
| Ph. D |
|---|
| Pursuing From VTU, Belgavi. |
Area Of Interest
VLSI Design, Image Processing
Experience
Teaching
14 Years
Publications
- Prashant Jalihal, V M Chougala, “Prevention of over voltage failures in adjustable speed drivers using DC bus voltage clamp”, volume 17, July 2014, ISJSET
- Madahalli , V M Chougala ,” Improving the power quality by four leg VSI” volume 4, Issue 5, 2013, IJETT.
Other
Workshops Attended
- Techniques of low power vlsi, 29-31 August 2007, NMAMIT Nitte
- “Analog and mixed mode VLSI design” 20-21 March 2009, KLS VDRIT, Haliyal.
- FDP on Teaching Methodologies, 23-24 January 2017, KLS VDRIT, Haliyal.
- Popularization of Remote Sensing based Maps and Geospatial Information, August 11 2017, Organized by ISRS & ISRO, KLS VDRIT Haliyal.